Program at a Glance
| Session | Chairs |
| Advanced Packaging & 3D Integrated Modules | Raja Ayyanar, Arizona State University; Hongbin Yu, Arizona State University |
| Materials for Advanced Packaging | Chanyeop Park, Arizona State University; Adam Morgan, NoMIS Power |
| Thermal Management |
Jong Ryu, North Carolina State University |
| Design, Modeling & Simulation | Doug Hopkins, North Carolina State University; Leslie Hwang, Arizona State University |
| Reliability & Failure Analysis | Jeff Ewanchuk, RTRC |
| Passive Components | Trifon Liakopoulos, Eneira; Kousuke Miyaji, Shinshu University |
| Power Delivery & Energy Storage | Francesco Carobolante, IoTissimo |
| Partner Session | Hongbin Yu, Arizona State University; Brian Narveson, PSMA |
| MTW Lab Tours (separate registration required) | Multiple ASU Researchers |
Plenary Speakers
Plenary P1 Presenter: Kaladhar Radhakrishnan, Intel
Plenary P2 Presenter: Yi Zheng, Applied Materials
Plenary P3 Presenter: Cian Ó Mathúna, Tyndall National Institute
Plenary P4 Presenter: Madhavan Swaminathan, Pennsylvania State University
Plenary P5 Presenter: Stephen Coates, Yuxuan Semi
Plenary P6 Presenter: Rinkle Jain, NVIDIA
Tutorials
The 3D-PEIM Organizing Committee is pleased to announce the addition of four two-hour short tutorials to the 3D-PEIM conference program.
The Tutorials will take place on Monday afternoon, November 16. There will be 2 sessions and 2 tracks each session:
1 PM – 3 PM:
- Advanced Packaging
George Dogiamis (DECA), Chanyeop Park (ASU), Hongbin Yu (ASU), and Chris Bailey (ASU) - Trends in Magnetic Material Properties to Meet the Challenges of Supporting High-Performance Computing
Matt Wilkowski (Wurth Elektronik)
3 PM – 3:15 PM Coffee break
3:15 PM – 5:15 PM
- Die-Attach by Metal Powder Sintering: The Science and Practice
G.Q. Lu (Virginia Tech) - Digital Twin-Driven Reliability and Prognostics in Power Electronics Systems
Jong Eun Ryu (North Carolina State University)
Panel Session
Following the tutorials, there will be panel session on “Key Challenges for 3D Power Electronics Packaging/Manufacturing” on November 16 (Monday) 5:30 PM – 7:00 PM from academic and industry experts (tentatively confirmed):
- Ravi Mahajan, Intel/HIR Chair
- Doug Hopkins, North Carolina State University/HIR Power Chapter
- Chris Bailey, Arizona State University/HIR Modeling and Simulation Chapter
- Pat McCluskey, University of Maryland/HIR Thermal Chapter
- George Dogiamis, Deca Technologies
- Francesco Carobolante, IoTissimo
Lab Tours
Continuing from last year, guided tours of MacroTechnology Works (MTW) state-of-the-art laboratory facilities will be offered. Tour participants will experience MTW’s advanced packaging facilities.
The MacroTechnology Works facility at Arizona State University is a one-of-a-kind asset among U.S. universities. MacroTechnology Works has 250,000-square-foot facility that operates as a semiconductor fabrication facility working at industry-standard sizes and specifications with 300-mm FOWLP line, enabling capabilities no other university in the country can offer. MacroTechnology Works serves as a working lab, fostering collaborations with industry partners in the private sector. From budding startups to established multinational corporations, semiconductor companies are attracted to locate here because ASU’s deep understanding of industry needs enables mutually beneficial collaborations in research, workforce development and education.
